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Полупроводники. Каталог (2011 год) - часть 8

 

 

Typical applications

ULN2064B, ULN2066B, ULN2068B, ULN2074B

10/14

7 Typical 

applications

Figure 18.

Common-anode LED drivers

         

Figure 19.

Common-cathode LED drivers

         

ULN2064B, ULN2066B, ULN2068B, ULN2074B

Package mechanical data

11/14

Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of 
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® 
specifications, grade definitions and product status are available at:

 www.st.com. 

ECOPACK® is an ST trademark.

Package mechanical data

ULN2064B, ULN2066B, ULN2068B, ULN2074B

12/14

Dim.

mm

inch.

Min.

 Typ.

 Max.

Min.

 Typ.

 Max.

a

1

0.51

0.020

B

0.

8

5

1.40

0.0

33

0.055

b

0.50

0.020

b

1

0.

38

0.50

0.015

0.020

D

20.0

0.7

8

7

E

8

.

8

0

0.

3

46

e

2.54

0.100

e

3

17.7

8

0.700

F

7.10

0.2

8

0

I

5.10

0.201

L

3

.

3

0

0.1

3

0

Z

1.27

0.050

PowerDIP-16

OUTLINE AND

MECHANICAL DATA

ULN2064B, ULN2066B, ULN2068B, ULN2074B

Revision history

13/14

Revision history  

Table 4.

Document revision history

Date

Revision

Changes

12-Sep-2003

1

First release

22-Jan-2009

2

Modified 

Table 1 on page 1

.

ULN2064B, ULN2066B, ULN2068B, ULN2074B

14/14

 

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Information in this document supersedes and replaces all information previously supplied.

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www.st.com

TECHNICAL DATA 

 

 

 

IL5851

 

PULSE DIALER WITH REDIAL

 

 

The IL5851 is a monolithic CMOS integrated circuit which uses an 
inexpensive RC oscillator for its frequency reference and provides all the 
features required for implementing a pulse dialer with 32 digit redial.

 

 

ORDERING INFORMATION 

IL5851N Plastic 

T

A

 = -20

°

 to 70

°

 C

 

 

Wide operating voltage range (2.0~6.0V) 

 

Low power dissipation 

 

Use either a standard 2 of 7 matrix keyboard with negative true common 
or the inexpensive form A-type keyboard 

 

Make/Break ratio can be selected 

 

Redial with * or #  

 

Continuous MUTE 

 

 

Power up clear circuitry on chip 

 

10 pps/20 pps can be selected 

PIN ASSIGNMENT 

 

 

LOGIC DIAGRAM 

 

 

PIN 1 = V

CC

 

PIN 6 = GND 

 

 

 

1

IL5851 

 

 

 

PIN DESCRIPTION 

 

NAME PIN 

DESCRIPTION

 

V

CC

Positive supply pin. 

The voltage on this pin is measured relative to Pin 6 and is supplied from a 
150

µ

A current source. This voltage should be regulated to less than 6.0 volts 

using on external form or regulation. 

V

REF

2 The 

V

REF

 output provides reference 

voltage that tracks internal 
parameters of the IL5851N. V

REF

 

provides a negative voltage reference 
to the V

CC

 supply. Its magnitude will 

be approximately 0.6 volt higher than 
the minimum operating voltage of 
each particular IL5851N. 

The typical application would be to 
connect the V

REF

 pin to the GND pin 

(Pin 6). The supply to the V

CC

 pin 

(Pin 1) should then be regulated to 
150

µ

A (I

OP

 max). with this amount of 

supply current, operation of the 
IL5851N is guaranteed.  

The internal circuit of the V

REF

 

function is shown in Figure 1 with its 
associated I-V characteristic 

 

___  _____ 

Row1-Row4, 

Col1-Col4 

3,4,5,13,
14,15,16 

Keyboard inputs. 

The IL5851N incorporates an innovative keyboard scheme that allows either the 
standard 2-of-7 keyboard with negative common or the inexpensive single 
contact (form A) keyboard to be used. 

A valid key entry is defined by either  a single row being connected to a single 
column or GND being simultaneously presented to both a single row and column. 
When in the on-hook mode, the row and column inputs are held high and no 
keyboard inputs are accepted. 

When off-hook, the keyboard is completely static until the initial valid key input 
is sensed. The oscillator is then enabled and the rows and columns are scanned 
alternately (pulled high, then low) to verify the varied input. The input must 
remain valid for 10msec of debounce time to be accepted. 

 

 

Form A type keyboard 

 

2 of 7 keyboard (negative common) 

 

 

2 of 7 keyboard 

 

Electronic input 

GND 6 

Negative 

supply 

 

 

2

IL5851 

 

 

pin is connected to the common part in general applications. 

RC1-RC3 7,8,9 Oscillator 

The IL5851N contains on-chip inverters to provide oscillator which will operate 
with a minimum external components. 

Following figure shows the on-chip configuration with the necessary external 
components. Optimum stability occurs with the ration K=R

S

/R equal to 10 

The oscillator period is given by: 

T=RC(1.386+(3.5KC

S

)/C-(2K/(K+1)) in (K/(1.5K + 0.5)) 

Where C

S

 is the stray capacitance on Pin 7. 

Accuracy and stability will be enhanced with this capacitance minimized. 

 

PPS 10 

10/20pps 

Select 

Connecting this pin to GND (pin 6) will select an output pulse rate of 10pps. 

Connecting the pin V

CC

 (pin 1) will select an output pulse rate of 20pps. 

M/B 11 

Make/break 

Select 

The Make/Break pin controls the Make/Break ratio of the pulse output. The 
make/Break ratio is controlled by connection V

CC

 or GND to this pin as shown in 

the following table. 

  

 

Input 

Make 

Break 

 

 

 

 

V

CC 

(Pin1) 33.4% 

66.6% 

 

  

 

GND(PIn 

6) 

40% 

60%  

____ 

Mute  

12 Mute 

Output 

The mute output is an open-drain N-Channel transistor designed to drive external 
bipolar transistor. 

This circuitry is usually used to mute the receiver during outpulsing. As shown in 
Fig. 2 the IL5851N mute output turns on (pulls to the V

GND

-supply) at the 

beginning of the predigital pause and turns off (goes to an open circuit) following 
the last break. 

The delay from the end of the last break until the mute output turns off is mute 
overlap and is specified as t

MO

OH 17 

ON-HOOK/TEST 

This pin detects the state of the hook switch contact “OFF HOOK” corresponds 
to V

SS

 condition. ÖN HOOK”corresponds to V

DD

 condition. When outpulsing in 

this mode, which can be up to 300msec, is completed, the circuit is deactivated 
and will require current only necessary to sustain the memory and power-up-clear 
detect circuitry (refer to the electrical specifications). 

Upon retuning off-hook, a negative transistion on the mute output will insure the 
speech network is connected to the line. If the first key entry is either a * or #, the 

 

 

3

IL5851 

 

 

number sequence stored on-chip will be outpulsed. Any other valid key entries 
will clear the memory and outpulse the new number sequence. 

______ 
PULSE 

18 Pulse 

Output 

The Pulse output is an open drain N-channel transistor designed to drive external 
bipolar transistor. These transistor would normally be used to pulse the telephone 
line by disconnecting and connecting the network. The IL5851N pulse output is 
an open circuit during make and pulls to the GND supply during break. 

 
 
 
 
 

MAXIMUM RATINGS

*

Symbol Parameter 

Value 

Unit 

V

CC

DC Supply Voltage (Referenced to GND) 

-0.3 to +6.2 

V

IN

DC Input Voltage (Referenced to GND) 

-0.3 to V

CC

 +0.3 

P

D

Power Dissipation in Still Air 

**

500 mW 

Tstg 

Storage Temperature 

-40 to +125 

°

*  

Maximum Ratings are those values beyond which damage to the device may occur. 

Functional operation should be restricted to the Recommended Operating Conditions. 

** 

 Derating:  -10 

mW

/

°

from 65

°

C to 70

°

C. 

 
 
 
 

RECOMMENDED OPERATING CONDITIONS 

Symbol Parameter Min 

Max 

Unit 

V

CC

DC Supply Voltage (Referenced to GND) 

2.0 

6.0 

V

IN

DC Input Voltage (Referenced to GND) 

V

CC

T

A

Operating Temperature 

-20 

+70 

°

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. 

However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this 
high-impedance circuit. For proper operation, V

IN

 and V

OUT

 should be constrained to the range GND

(V

IN

 or 

V

OUT

)

V

CC

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V

CC

). Unused 

outputs must be left open. 

 
 
 
 
 
 
 
 
 
 
 
 

 

 

4

IL5851 

 

 

DC ELECTRICAL CHARACTERISTICS

(Voltages Referenced to GND, V

CC

 = 2.0 V to 6.0V,  

T

A

 = -20 to +70

°

C, F

OSC

=2.4KHz) 

  

 Guaranteed 

Limits 

 

Symbol Parameter 

Test 

Conditions 

Min 

Typ 

Max 

Unit 

V

IH

Input High Voltage 

 

0.8V

CC

 

V

CC

V

IL

Input Low Voltage 

 

 

0.2V

CC

V

DR

Minimum Memory 
Retention Voltage 

 1.0 

 

 

I

OL

Output Leakage Current 

V

CC

=6.0V     ,      

MUTE,PULSE=6.0V 

  1 

µ

I

OL1

Minimum Output current  
______   
(MUTE,PULSE) 

V

O

=0.8V,V

CC

=2.5V 0.5      mA 

I

OL2

Minimum Output current  
______   
(MUTE,PULSE) 

V

O

=0.8V,V

CC

=3.5V 1.7      mA 

I

OD

Operating Current 

All output under no load, 
V

CC

=2.0V 

  

150 

µ

I

SD

Maximum Standby 
Current 

V

CC

=2.5V 

V

IH

=2.5V 

  1 

µ

I

REF

Minimum Reference 
Current 

V

CC

=6.0V 1 

 

 

µ

 
 
AC ELECTRICAL CHARACTERISTICS  

(F

OSC

= 2.4 KHz, V

CC

=2.0 to 6.0 V, T

A

=-20 to +70

°

C ) 

 

Symbol  

Parameter 

Test Conditions 

Guaranteed Limit 

Unit  

  

 

Min. Typ.  Max 

 

T

KD

Minimum Valid 
Key Entry Time  

 20 

 

 

mS 

T

OH

On Hook Time 
Required to 
Clear Memory 
(Figure 2) 

 300 

 

 mS 

T

IDR

Inter Digital 
Pause (Figure 2) 

  

800 

 

mS 

Frequency 
Sability 

 

 

±

10 

 % 

T

MO

Recovery Time, 
MUTE to 
PULSE  
(Figure 2) 

  

800 

 

mS 

T

PDP

Maximum Pre-
digital Pause 
(Figure 2) 

  

 

30 

mS 

T

DP

Maximum Delay 
Time, Key Input 
to PULSE 
(Figure 2) 

  

 

50 

mS 

M/B Make/Break 

 

  1/2 

 

M/B=V

CC

 Ratio 

 

 

2/3 

 

M/B=GND 

 

 

 

 

5

IL5851 

 

 

 
 
 
 
 
 

TIMING DIAGRAMM 

 

 

 

Figure 2 

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

 

 

6

IL5851 

 

 

 
 
 
 

 

N SUFFIX PLASTIC DIP

(MS - 001AC)

Symbol

MIN

MAX

A

22.35

23.37

B

6.1

7.11

C

5.33

D

0.36

0.56

F

1.14

1.78

G

H

J

0

°

10

°

K

2.92

3.81

NOTES:

L

7.62

8.26

1.

     

Dimensions “A”, “B” do not include mold flash or protrusions.

M

0.2

0.36

   Maximum mold flash or protrusions 0.25 mm (0.010) per side.

N

0.38

2.54

7.62

Dimension, mm

L

H

M

J

A

B

F

G

D

SEATING
PLANE

N

K

0.25 (0.010) M    T

-T-

C

1

18

9

10

 
 
 
 

 

 

7

SN75468, SN75469

DARLINGTON TRANSISTOR ARRAYS

SLRS023B – DECEMBER 1976 – REVISED SEPTEMBER 1995

 1995, Texas Instruments Incorporated

3–1

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

     

500-mA Rated Collector Current (Single
Output)

High-Voltage Outputs . . . 100 V

Output Clamp Diodes

Inputs Compatible With Various Types of
Logic

Relay Driver Applications

Higher-Voltage Versions of ULN2003A and
ULN2004A, for Commercial Temperature
Range

description

The SN75468 and SN75469 are monolithic high-voltage, high-current Darlington transistor arrays. Each
consists of seven npn Darlington pairs that feature high-voltage outputs with common-cathode clamp diodes
for switching inductive loads. The collector-current rating of each Darlington pair is 500 mA. The Darlington pairs
may be paralleled for higher current capability. Applications include relay drivers, hammer drivers, lamp drivers,
display drivers (LED and gas discharge), line drivers, and logic buffers.

The SN75468 has a 2700-

 series base resistor for each Darlington pair for operation directly with TTL or 5-V

CMOS. The SN75469 has a 10.5-k

 series base resistor to allow its operation directly with CMOS or PMOS

that use supply voltages of 6 to 15 V. The required input current is below that of the SN75468.

logic symbol

logic diagram

7B

6B

5B

4B

3B

2B

1B

7C

6C

5C

4C

3C

2C

1C

COM

7

6

5

4

3

2

1

10

11

12

13

14

15

16

9

7C

6C

5C

4C

3C

2C

1C

COM

7

6

5

4

3

2

1

7B

6B

5B

4B

3B

2B

1B

10

11

12

13

14

15

16

9

CLAMP

† This symbol is in accordance with ANSI/IEEE

Std91-1984 and IEC publication 617-12.

1

2

3

5

6

7

8

16

15

14

13

12

11

10

9

1B
2B
3B
4B
5B
6B
7B

E

1C
2C
3C
4C
5C
6C
7C
COM

(TOP VIEW)

D OR N PACKAGE

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

SN75468, SN75469
DARLINGTON TRANSISTOR ARRAYS

SLRS023B – DECEMBER 1976 – REVISED SEPTEMBER 1995

3–2

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

schematic (each Darlington pair)

COM

C

E

3 k

7.2 k

RB

 B

SN75468: RB = 2.7 k

SN75469: RB = 10.5 k

All resistor values shown are nominal.

absolute maximum ratings at 25

°

C free-air temperature (unless otherwise noted)

Collector-emitter voltage, V

CE

 

 100 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Input voltage, V

I

 (see Note 1) 

 30 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Peak collector current (see Figures 14 and 15) 

 500 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Output clamp current, I

OK

 

 500 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Total emitter-terminal current 

 – 2.5 A

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Continuous total power dissipation 

 See Dissipation Rating Table

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Operating free-air temperature range, T

A

 

 0

°

C to 70

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Storage temperature range, T

stg

   

– 65

°

C to 150

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 

 260

°

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 

NOTE 1: All voltage values are with respect to the emitter/substrate terminal E, unless otherwise noted.

DISSIPATION RATING TABLE

PACKAGE

TA 

 25

°

C

POWER RATING

DERATING FACTOR

ABOVE TA = 25

°

C

TA = 70

°

C

POWER RATING

D

950 mW

7.6 mW/

°

C

608 mW

N

1150 mW

9.2 mW/

°

C

736 mW

SN75468, SN75469

DARLINGTON TRANSISTOR ARRAYS

SLRS023B – DECEMBER 1976 – REVISED SEPTEMBER 1995

3–3

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

electrical characteristics, T

A

 = 25

°

C (unless otherwise noted)

PARAMETER

TEST

TEST CONDITIONS

SN75468

SN75469

UNIT

PARAMETER

TEST

FIGURE

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

IC = 125 mA

5

IC = 200 mA

2.4

6

VI( )

On state input voltage

5

VCE = 2 V

IC = 250 mA

2.7

V

VI(on)

On-state input voltage

5

VCE = 2 V

IC = 275 mA

7

V

IC = 300 mA

3

IC = 350 mA

8

C ll

t

itt

II = 250 

µ

A,

IC = 100 mA

0.9

1.1

0.9

1.1

VCE(sat)

Collector-emitter
saturation voltage

6

II = 350 

µ

A,

IC = 200 mA

1

1.3

1

1.3

V

(

)

saturation voltage

II = 500 

µ

A,

IC = 350 mA

1.2

1.6

1.2

1.6

VF

Clamp-diode forward 
voltage

8

IF = 350 mA

1.7

2

1.7

2

V

1

VCE = 100 V,

II = 0

50

50

ICEX

Collector cutoff current

1

VCE = 100 V,

II = 0

100

100

µ

A

2

CE

,

TA = 70

°

C

VI = 1 V

500

II( ff)

Off state input current

3

VCE = 50 V,

IC = 500 

µ

A,

50

65

50

65

µ

A

II(off)

Off-state input current

3

CE

,

TA = 70

°

C

C

µ

,

50

65

50

65

µ

A

VI = 3.85 V

0.93

1.35

II

Input current

4

VI = 5 V

0.35

0.5

mA

VI = 12 V

1

1.45

IR

Clamp-diode reverse

7

VR = 100 V

50

50

µ

A

IR

current

7

VR = 100 V,

TA = 70

°

C

100

100

µ

A

Ci

Input capacitance

VI = 0,

f =  1 MHz

15

25

15

25

pF

switching characteristics, T

A

 = 25

°

C free-air temperature

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH

Propagation delay time, low-to-high-level output

VS = 50 V,

 RL = 163 

,

CL = 15 pF,

0.25

1

µ

s

tPHL

Propagation delay time, high-to-low-level output

S

See Figure 9

L

L

0.25

1

µ

s

VOH

High-level output voltage after switching

VS = 50 V,

IO 

 300 mA,

See Figure 10

VS – 20

mV

SN75468, SN75469
DARLINGTON TRANSISTOR ARRAYS

SLRS023B – DECEMBER 1976 – REVISED SEPTEMBER 1995

3–4

POST OFFICE BOX 655303 

 DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

Figure 1. I

CEX

Figure 2. I

CEX

VI

Open

Open

VCE

Open

ICEX

VCE

ICEX

Figure 3. I

I(off)

Figure 4. I

I

VI

II(on)

Open

IC

II(off)

Open

VCE

IC

VCE

NOTE: II is fixed for measuring VCE(sat),

variable for measuring hFE.

Figure 5. V

I(on)

Figure 6. h

FE

, V

CE(sat)

IC

II

VCE

VCE

VI(on)

Open

IC

Open

hFE =

IC

II

Figure 7. I

R

Figure 8. V

F

VF

IF

Open

IR

Open

VR

 

 

 

 

 

 

 

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